This invention generally relates to silicon-on-insulator ("SOI") bonded semiconductor wafers and, more particularly to a process for stripping the outer edges of bond and etch back silicon-on-insulator ("BESOI") wafers.
An SOI bonded wafer has a handle wafer, a thin device layer, and an oxide film (layer), constituting an insulating film, between the handle wafer and device layer. It is made from two semiconductor silicon wafers each having at least one face with specular gloss. An oxide layer is formed on the specular glossy face of one or both wafers, and the two wafers are joined together with the specular glossy faces facing each other and with the oxide layer being between the two wafers. The joined wafers are heated to an appropriate temperature to increase the bonding strength. One of the wafers constitutes a handle wafer and the other constitutes a device wafer. The exposed surface of the device wafer is ground and/or etched and polished until the device wafer becomes a thin layer, i.e., the device layer.
A BESOI wafer is one type of SOI wafer and may be prepared by forming an etch stop layer of very heavily doped silicon on a silicon substrate, forming a device layer of silicon on the etch stop layer, forming an insulator layer on the device layer and bonding a handle wafer to the insulator layer. The silicon substrate may be removed by etching, or by a combination of mechanical grinding followed by etching with a preferential etch solution such as KOH which will stop etching at the interface of the etch stop layer and the exposed etch stop layer may thereafter be removed using a preferential etch solution such as a mixture of HF/nitric acid/acetic acid ("HNA") in a ratio of 1:3:8. The HNA preferentially etches the etch stop layer, thus exposing the underlying device layer. See, for example, European Patent Application, Publication No. 0 520 216 A2.
When BESOI wafers are bonded, however, the edges of the wafers often fail to uniformly bond. As a result, the device layer of BESOI wafers often have edge margins of approximately 2-10 mm which exhibit voids, bubbles and other delaminations. These voids, bubbles and other delaminations detract from the desirability of the BESOI wafers.